Hello,
The Parallel-in to Serial-out shift register acts in the opposite way to the serial-in to parallel-out one above. The data is loaded into the register in a parallel format in which all the data bits enter their inputs simultaneously, to the parallel input pins P A to P D of the register.
I'm a beginner using verilog. I am trying to make a simple parallel
to serial converter (8 bits parallel down to 1 bit serial). I have 2
textbooks but I think it is way too complicated for me to understand.
Right now when I try to simulate my simple Parallel-to-Serial module the
input of 8-bits parallel appear but only 1 of the 8 serial bit appear.
What want is for the 8 bits that comes parallel into the module to be
broken up into 8 bits that come out serially. For example if I put in
11110000 as input I want 1 1 1 1 0 0 0 0 as outputs. But I only get the
first of the serial bit output (1). Can anyone help? I think there might
be something wrong with my testbench. I'm really not good at verilog.
Hope someone can help. Thank you!
to serial converter (8 bits parallel down to 1 bit serial). I have 2
textbooks but I think it is way too complicated for me to understand.
Right now when I try to simulate my simple Parallel-to-Serial module the
input of 8-bits parallel appear but only 1 of the 8 serial bit appear.
What want is for the 8 bits that comes parallel into the module to be
broken up into 8 bits that come out serially. For example if I put in
11110000 as input I want 1 1 1 1 0 0 0 0 as outputs. But I only get the
first of the serial bit output (1). Can anyone help? I think there might
be something wrong with my testbench. I'm really not good at verilog.
Hope someone can help. Thank you!
Z
//VERILOG PARALLEL 2 SERIAL
module P2S (in_array, out1, out2, CLK, RESET, EN);
input CLK, RESET, EN;
input [7:0] in_array;
output out1;
output out2;
reg out1;
reg out2;
integer d;
input CLK, RESET, EN;
input [7:0] in_array;
output out1;
output out2;
reg out1;
reg out2;
integer d;
begin
for (d=0; d<8; d=d+1)
begin
out1=in_array[d];
out2=in_array[d+1];
end
end
endmodule
// VERILOG PARALLEL 2 SERIAL
//TESTBENCH
//TESTBENCH
module p2stest;
reg CLK, RESET, EN;
reg [7:0] in_array;
wire out1;
wire out2;
reg [7:0] in_array;
wire out1;
wire out2;
P2S DEC(in_array, out1, out2, CLK, RESET, EN);
always #10 CLK = ~CLK;
$monitor($time, 'in_array = %b out1 = %b out2 = %b CLK = %d RESET = %d
EN = %d',
in_array, out1, out2, CLK, RESET, EN);
initial
begin
$dumpfile ('s2p1.dump');
$dumpvars;
end
begin
$dumpfile ('s2p1.dump');
$dumpvars;
end
initial
begin
CLK=0;
RESET = 0; in_array = 8'b10101010;
#200 RESET = 0;in_array = 8'b10101010;
#200$finish;
end
begin
CLK=0;
RESET = 0; in_array = 8'b10101010;
#200 RESET = 0;in_array = 8'b10101010;
#200$finish;
end
endmodule
A serial-in, parallel-out shift register is similar to the serial-in, serial-out shift register in that it shifts data into internal storage elements and shifts data out at the serial-out, data-out, pin.It is different in that it makes all the internal stages available as outputs. Therefore, a serial-in, parallel-out shift register converts data from serial format to parallel format.An Example of Using Serial-in, Parallel-out Shift Register
If four data bits are shifted in by four clock pulses via a single wire at data-in, below, the data becomes available simultaneously on the four Outputs QA to QD after the fourth clock pulse. The practical application of the serial-in, parallel-out shift register is to convert data from serial format on a single wire to parallel format on multiple wires.Let’sl illuminate four LEDs (light emitting diodes) with the four outputs (QA QB QC QD). The above details of the serial-in, parallel-out shift register are fairly simple. It looks like a serial-in, serial-out shift register with taps added to each stage output. Serial data shifts in at SI (Serial Input). After a number of clocks equal to the number of stages, the first data bit in appears at SO (QD) in the above figure. In general, there is no SO pin. The last stage (QD above) serves as SO and is cascaded to the next package if it exists.Serial-in, Parallel-out vs. Serial-in, Serial-out Shift Register
If a serial-in, parallel-out shift register is so similar to a serial-in, serial-out shift register, why do manufacturers bother to offer both types? Why not just offer the serial-in, parallel-out shift register?The answer is that they actually only offer the serial-in, parallel-out shift register, as long as it has no more than 8-bits. Note that serial-in, serial-out shift registers come in bigger than 8-bit lengths of 18 to 64-bits. It is not practical to offer a 64-bit serial-in, parallel-out shift register requiring that many output pins.See waveforms below for above shift register. The shift register has been cleared prior to any data by CLR’, an active low signal, which clears all type D Flip-Flops within the shift register. Note the serial data 1011 pattern presented at the SI input. This data is synchronized with the clock CLK. This would be the case if it is being shifted in from something like another shift register, for example, a parallel-in, serial-out shift register (not shown here). On the first clock at t1, the data 1 at SI is shifted from D to Q of the first shift register stage. After t2 this first data bit is at QB. After t3 it is at QC. After t4 it is at QD. Four clock pulses have shifted the first data bit all the way to the last stage QD. The second data bit a 0 is at QC after the 4th clock. The third data bit a 1 is at QB. The fourth data bit another 1 is at QA. Thus, the serial data input pattern 1011 is contained in (QD QC QB QA). It is now available on the four outputs.It will available on the four outputs from just after clock t4 to just before t5. This parallel data must be used or stored between these two times, or it will be lost due to shifting out the QD stage on following clocks t5 to t8 as shown above.Let’s take a closer look at serial-in, parallel-out shift registers available as integrated circuits, courtesy of Texas Instruments. For complete device data sheets, follow the links.- SN74ALS164A serial-in/ parallel-out 8-bit shift register [*]
- SN74AHC594 serial-in/ parallel-out 8-bit shift register with output register [*]
- SN74AHC595 serial-in/ parallel-out 8-bit shift register with output register [*]
- CD4094 serial-in/ parallel-out 8-bit shift register with output register [*][*]
could be cascaded to SERIAL IN of a succeeding device.A real-world application of the serial-in, parallel-out shift register is to output data from a microprocessor to a remote panel indicator. Or, another remote output device which accepts serial format data. The figure “Alarm with remote key pad” is repeated here from the parallel-in, serial-out section with the addition of the remote display. Thus, we can display, for example, the status of the alarm loops connected to the main alarm box. If the Alarm detects an open window, it can send serial data to the remote display to let us know. Both the keypad and the display would likely be contained within the same remote enclosure, separate from the main alarm box. However, we will only look at the display panel in this section.If the display were on the same board as the Alarm, we could just run eight wires to the eight LEDs along with two wires for power and ground. These eight wires are much less desirable on a long run to a remote panel. Using shift registers, we only need to run five wires- clock, serial data, a strobe, power, and ground. If the panel were just a few inches away from the main board, it might still be desirable to cut down on the number of wires in a connecting cable to improve reliability. Also, we sometimes use up most of the available pins on a microprocessor and need to use serial techniques to expand the number of outputs. Some integrated circuit output devices, such as Digital to Analog converters contain serial-in, parallel-out shift registers to receive data from microprocessors. The techniques illustrated here are applicable to those parts. We have chosen the 74AHC594 serial-in, parallel-out shift register with output register; though, it requires an extra pin, RCLK, to parallel load the shifted-in data to the output pins. This extra pin prevents the outputs from changing while data is shifting in. This is not much of a problem for LEDs. But, it would be a problem if driving relays, valves, motors, etc.Code executed within the microprocessor would start with 8-bits of data to be output. One bit would be output on the “Serial data out” pin, driving SER of the remote 74AHC594. Next, the microprocessor generates a low to high transition on “Shift clock”, driving SRCLK of the ‘595 shift register. This positive clock shifts the data bit at SER from “D” to “Q” of the first shift register stage. This has no effect on the QA LED at this time because of the internal 8-bit output register between the shift register and the output pins (QA to QH). Finally, “Shift clock” is pulled back low by the microprocessor. This completes the shifting of one bit into the ‘595.The above procedure is repeated seven more times to complete the shifting of 8-bits of data from the microprocessor into the 74AHC594 serial-in, parallel-out shift register. To transfer the 8-bits of data within the internal ‘595 shift register to the output requires that the microprocessor generate a low to high transition on RCLK, the output register clock. This applies new data to the LEDs. The RCLK needs to be pulled back low in anticipation of the next 8-bit transfer of data.The data present at the output of the ‘595 will remain until the process in the above two paragraphs is repeated for a new 8-bits of data. In particular, new data can be shifted into the ‘595 internal shift register without affecting the LEDs. The LEDs will only be updated with new data with the application of the RCLK rising edge.What if we need to drive more than eight LEDs? Simply cascade another 74AHC594 SER pin to the QH’ of the existing shifter. Parallel the SRCLK and RCLK pins. The microprocessor would need to transfer 16-bits of data with 16-clocks before generating an RCLK feeding both devices.The discrete LED indicators, which we show, could be 7-segment LEDs. Though, there are LSI (Large Scale Integration) devices capable of driving several 7-segment digits. This device accepts data from a microprocessor in a serial format, driving more LED segments than it has pins by multiplexing the LEDs. For example, see the link below for the MAX6955 datasheet.[*]